Conventionally, a semiconductor device diagnosis technique utilizing a built-in self-test (BIST) for a logic circuit (hereinafter referred to as “logic BIST”) has been widely used. A logic BIST may be conducted not only in initial diagnosis at the time of start-up of a semiconductor device, but also in regular diagnosis during operation of the semiconductor device.
Also, a technique using retention flip-flops for restoration of respective data in a semiconductor device has been proposed.
Each retention flip-flop includes a main unit and a retention section, and before power shut-down, can save data in the retention section and after power recovery, restore the data in the main unit from the saved data in the retention section.
However, where retention flip-flops are used for diagnosis of a semiconductor device, if a defect or a failure occurs in retention performance of the retention sections and/or save operation and restoration operation of the retention flip-flops, data is not correctly restored. Conventionally, no method for diagnosis of such retention performance of retention sections and save operation and restoration operation of retention flip-flops has been proposed.